Demand driven simulation: BACKSIM
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Automatic generation of compiled simulations through program specialization
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Partial evaluation and automatic program generation
Partial evaluation and automatic program generation
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Efficient circuit partitioning to extend cycle simulation beyond synchronous circuits
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Methodology for hardware/software co-verification in C/C++ (short paper)
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Computer
Flexible and Formal Modeling of Microprocessors with Application to Retargetable Simulation
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Cooperative multithreading on 3mbedded multiprocessor architectures enables energy-scalable design
Proceedings of the 42nd annual Design Automation Conference
An interactive codesign environment for domain-specific coprocessors
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Side-channel resistant system-level design flow for public-key cryptography
Proceedings of the 17th ACM Great Lakes symposium on VLSI
HW/SW co-design of a hyperelliptic curve cryptosystem using a microcode instruction set coprocessor
Integration, the VLSI Journal - Special issue: Embedded cryptographic hardware
CATS: cycle accurate transaction-driven simulation with multiple processor simulators
Proceedings of the conference on Design, automation and test in Europe
Efficient and secure fingerprint verification for embedded devices
EURASIP Journal on Applied Signal Processing
HW/SW co-design for public-key cryptosystems on the 8051 micro-controller
Computers and Electrical Engineering
IEEE Transactions on Computers
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We present a technique to improve the efficiency of hardware-software cosimulation, using design information known at simulator compile-time. The generic term for such optimization is partial evaluation. Our contribution is that we apply the optimization transparantly to the user, and at multiple abstraction levels in the simulation.We use the technique to create an interactive codesign environment, and evaluate it on several designs including an AES encryption coprocessor and a Viterbi decoder, and for several instruction-set simulators. Compared to SystemC-based cosimulation, we achieve comparable cosimulation performance at only a fraction of the model-build time.