Branch-and-bound placement for building block layout
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Rectangle-packing-based module placement
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Module placement on BSG-structure and IC layout applications
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Cluster refinement for block placement
DAC '97 Proceedings of the 34th annual Design Automation Conference
An O-tree representation of non-slicing floorplan and its applications
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
A new algorithm for floorplan design
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Multidimensional binary search trees used for associative searching
Communications of the ACM
Corner block list: an effective and efficient topological representation of non-slicing floorplan
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
GALLO: a genetic algorithm for floorplan area optimization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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In this paper, a simple while effective deterministic algorithm for solving the VLSI block placement problem is proposed considering the packing area and interconnect wiring simultaneously. The algorithm is based on a principle inspired by observations of ancient professionals in solving their similar problems. Using the so-called Less Flexibility First principle, it is tried to pack blocks with the least packing flexibility on its shape and interconnect requirement to the empty space with the least packing flexibility in a greedy manner. Experimental results demonstrate that the algorithm, though simple, is quite effective in solving the problem. The same philosophy could also be used in designing efficient heuristics for other hard problems, such as placement with preplaced modules, placement with L/T shape modules, etc.