Clock rate versus IPC: the end of the road for conventional microarchitectures
Proceedings of the 27th annual international symposium on Computer architecture
Imagine: Media Processing with Streams
IEEE Micro
Managing power and performance for System-on-Chip designs using Voltage Islands
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
IC Design Challenges for Ambient Intelligence
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
A multithreaded PowerPC processor for commercial servers
IBM Journal of Research and Development
Energy-centric enabling tecumologies for wireless sensor networks
IEEE Wireless Communications
Cycle-accurate power analysis for multiprocessor systems-on-a-chip
Proceedings of the 14th ACM Great Lakes symposium on VLSI
Exploring the energy efficiency of cache coherence protocols in single-chip multi-processors
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
An opportunistic reconfiguration strategy for environmentally powered devices
Proceedings of the 3rd conference on Computing frontiers
Dynamic and formal verification of embedded systems: a comparative survey
International Journal of Parallel Programming
Power macromodeling of MPSoC message passing primitives
ACM Transactions on Embedded Computing Systems (TECS) - Special Section LCTES'05
Review: Ambient intelligence: Technologies, applications, and opportunities
Pervasive and Mobile Computing
Hardware design and simulation for verification
SFM'06 Proceedings of the 6th international conference on Formal Methods for the Design of Computer, Communication, and Software Systems
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Computational platforms are a key enabling technology for materializing the Ambient Intelligence vision. Ambient intelligence devices will require a widely ranging computational power under widely ranging system-level constraints on cost, reliability, power consumption. We coarsely group computational architectures in three broad classes, namely: fixed-base network (the workhorses), wireless base network (the hummingbirds), and wireless sensor network (the butterflies). Speed and power requirements for devices in these three classes span six orders of magnitude. In this paper, we analyze commonalities and differences between these three classes of computational architectures, and moving from the analysis of representative state-of-the-art devices, we survey design trends directions of research.