Power analysis of embedded software: a first step towards software power minimization
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
Energy-efficient design of battery-powered embedded systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low power electronics and design
Cosimulation-based power estimation for system-on-chip design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Evaluating Integrated Hardware-Software Optimizations Using a Unified Energy Estimation Framework
IEEE Transactions on Computers
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Embedded Operating System Energy Analysis and Macro-Modeling
ICCD '02 Proceedings of the 2002 IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD'02)
Using Complete Machine Simulation for Software Power Estimation: The SoftWatt Approach
HPCA '02 Proceedings of the 8th International Symposium on High-Performance Computer Architecture
Energy characterization of embedded real-time operating systems
Compilers and operating systems for low power
Analyzing On-Chip Communication in a MPSoC Environment
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Ambient intelligence: a computational platform perspective
Ambient intelligence
Integrating complete-system and user-level performance/power simulators: the SimWattch approach
ISPASS '03 Proceedings of the 2003 IEEE International Symposium on Performance Analysis of Systems and Software
Instruction-based system-level power evaluation of system-on-a-chip peripheral cores
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Analysis of power dissipation in embedded systems using real-time operating systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
MPSoC ECG biochip: a multiprocessor system-on-chip for real-time human heart monitoring and analysis
Proceedings of the 3rd conference on Computing frontiers
Exploiting TLM and object introspection for system-level simulation
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Proceedings of the 43rd annual Design Automation Conference
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
ACM Transactions on Design Automation of Electronic Systems (TODAES)
LOCS: a low overhead profiler-driven design flow for security of MPSoCs
CODES+ISSS '08 Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis
Hardware/Software Architecture for Real-Time ECG Monitoring and Analysis Leveraging MPSoC Technology
Transactions on High-Performance Embedded Architectures and Compilers I
On the energy-efficiency of software transactional memory
Proceedings of the 22nd Annual Symposium on Integrated Circuits and System Design: Chip on the Dunes
STM versus lock-based systems: an energy consumption perspective
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
CUFFS: an instruction count based architectural framework for security of MPSoCs
Proceedings of the Conference on Design, Automation and Test in Europe
Quasi-static voltage scaling for energy minimization with time constraints
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Estimating energy consumption for an MPSoC architectural exploration
ARCS'06 Proceedings of the 19th international conference on Architecture of Computing Systems
Power Modeling and Characterization of Computing Devices: A Survey
Foundations and Trends in Electronic Design Automation
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Developing energy-aware software for multiprocessor systems-on-chip (MPSoCs) is a difficult task, which requires the knowledge of the distribution of the power consumption among several heterogeneous devices (cores, memories, busses, etc.). In this work we analyze the power breakdowns of power consumption for a complete MPSoC platform, under several application workloads and operating conditions. We leverage a complete-system simulation platform with accurate power models for all key hardware modules. Our analysis shows that caches and system interconnect dominate in the power breakdown, pointing out how software locality is meaningful not only for performance but also for energy optimization.