On the energy-efficiency of software transactional memory

  • Authors:
  • F. Klein;A. Baldassin;G. Araujo;P. Centoducatte;R. Azevedo

  • Affiliations:
  • State University of Campinas (UNICAMP), Campinas, Brazil;State University of Campinas (UNICAMP), Campinas, Brazil;State University of Campinas (UNICAMP), Campinas, Brazil;State University of Campinas (UNICAMP), Campinas, Brazil;State University of Campinas (UNICAMP), Campinas, Brazil

  • Venue:
  • Proceedings of the 22nd Annual Symposium on Integrated Circuits and System Design: Chip on the Dunes
  • Year:
  • 2009

Quantified Score

Hi-index 0.00

Visualization

Abstract

Traditional software transactional memory designs are targeted towards performance and therefore little is known about their impact on energy consumption. We provide, in this paper, a comprehensive energy analysis of a standard STM design and propose novel scratchpad-based energy-aware STM design strategies. Experimental results collected through a state-of-the-art MPSoC simulation infrastructure show that our approach can achieve an energy improvement of up to ~36% with regard to the base STM for applications characterized by short-lived transactions and relatively high abort rate.