Distributing Hot-Spot Addressing in Large-Scale Multiprocessors
IEEE Transactions on Computers
Deadlock-Free Message Routing in Multiprocessor Interconnection Networks
IEEE Transactions on Computers
Using feedback to control tree saturation in multistage interconnection networks
ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture
Nonuniform traffic spots (NUTS) in multistage interconnection networks
Journal of Parallel and Distributed Computing
Performance of a crosspoint buffered ATM switch fabric
IEEE INFOCOM '92 Proceedings of the eleventh annual joint conference of the IEEE computer and communications societies on One world through communications (Vol. 1)
A New Theory of Deadlock-Free Adaptive Routing in Wormhole Networks
IEEE Transactions on Parallel and Distributed Systems
“Hypermeshes”: optical interconnection networks for parallel computing
Journal of Parallel and Distributed Computing
Using a Multipath Network for Reducing the Effects of Hot Spots
IEEE Transactions on Parallel and Distributed Systems
Survey of ATM switch architectures
Computer Networks and ISDN Systems
Interconnection network analysis for a compliant massively parallel processor
Journal of Systems Architecture: the EUROMICRO Journal
An Analytical Model of Adaptive Wormhole Routing in Hypercubes in the Presence of Hot Spot Traffic
IEEE Transactions on Parallel and Distributed Systems
Analytical Modeling of Wormhole-Routed k-Ary n-Cubes in the Presence of Hot-Spot Traffic
IEEE Transactions on Computers
On the merits of hypermeshes and tori with adaptive routing
Journal of Systems Architecture: the EUROMICRO Journal
Limits on Interconnection Network Performance
IEEE Transactions on Parallel and Distributed Systems
Performance Analysis of Minimal Adaptive Wormhole Routing with Time-Dependent Deadlock Recovery
IPPS '97 Proceedings of the 11th International Symposium on Parallel Processing
SPDP '95 Proceedings of the 7th IEEE Symposium on Parallel and Distributeed Processing
Design and analysis of scalable reconfigurable ip routers
Design and analysis of scalable reconfigurable ip routers
Comparative Modeling of Network Topologies and Routing Strategies in Multicomputers
International Journal of High Performance Computing Applications
Interconnection network front-end controller combining to reduce hot spots effects
Computer Communications
Switch fabric design for high performance IP routers: a survey
Journal of Systems Architecture: the EUROMICRO Journal
Architectural designs for a scalable reconfigurable IP router
Journal of Systems Architecture: the EUROMICRO Journal
International Journal of Network Management
Journal of Network and Computer Applications
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This paper provides an in-depth analysis using six basic router functional requirements, a primary switch fabrics (SFs) selection criterion, and a semi-quantitative compliance scoring scheme for 10 SFs. The goal is to select candidates that can serve a hardware (HW)-wise scalable and bi-directionally reconfigurable Internet Protocol (IP) router. HW scalability and bi-directional HW reconfigurability for an IP router denote respectively its ability to (1) expand according to network traffic capacity growth; and (2) be functionally converted to perform in two conceptual directions on-demand: "downward" as "edge", or "upward" as "hub" or "backbone" router according to the layer of the internet services provider's network hierarchy it is targeted to serve at the moment. Overall result points to Hypercube, Multistage Interconnection Network (MIN), and 3-Dimensional Torus Mesh as potential candidates.