Wafer-level RF Test and DfT for VCO Modulating Transceiver Architecures

Authors:
Sule Ozev;Christian Olgaard
Affiliations:
-;-
Venue:
VTS '04 Proceedings of the 22nd IEEE VLSI Test Symposium
Year:
2004

Citing 5
Cited 4

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Abstract

Traditionally, radio frequency (RF) paths are bypassedduring wafer sort due to the high cost of RF testing. Increasingpackaging costs, however, result in a need for amore thorough wafer-level testing including the RF path.In this paper, we propose a loop-back architecture, alongwith a novel, all-digital design-for-testability (DfT) modificationthat enables cost efficient testing of various defectsat the wafer level. These methods are applicable to a widerange of cost-sensitive applications that use the modulationof the voltage-controlled-oscillator (VCO). Experimentalresults using a Bluetooth platform and considering a varietyof defects confirm the viability of the approach.