SubGemini: identifying subcircuits using a fast subgraph isomorphism algorithm
DAC '93 Proceedings of the 30th international Design Automation Conference
LOGEX—an automatic logic extractor form transistor to gate level for CMOS technology
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
ITC '98 Proceedings of the 1998 IEEE International Test Conference
A technology independent block extraction algorithm
DAC '84 Proceedings of the 21st Design Automation Conference
An improved layout verification algorithm (LAVA)
EURO-DAC '90 Proceedings of the conference on European design automation
SubIslands: the probabilistic match assignment algorithm for subcircuit recognition
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Sizing rules for bipolar analog circuit design
Proceedings of the conference on Design, automation and test in Europe
External memory layout vs. schematic
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Hi-index | 0.00 |
This paper presents FROSTY, a computer programfor automatically extracting the hierarchy of a large-scale digitalCMOS circuit from its transistor-level netlist description and alibrary of subcircuits. To handle the complexity of industrialcircuits, FROSTY combines traditional structural recognition andpattern matching methods into a two-step extraction process.First, gate structures based on channel-connected-components arerecognized from a circuit netlist and library subcircuits. Thenannotated graphs representing the connectivity and properties ofgate structures are constructed. Comparing to transistor-levelnetlists, these graphs are much smaller in size, moredistinguishable in structure, and are thus more suitable forlabeling based pattern matching. An efficient pattern matchingalgorithm is applied to extract the circuit hierarchy from thesecondensed circuit graphs. FROSTY has been demonstrated to beorders of magnitude faster than the best known extractionprogram SubGemini, capable of extracting the entire hierarchy ofindustrial designs with several hundred thousand transistors in afew minutes on a Sun workstation. Further FROSTY is scale withthe size of a circuit.