Transactional memory: architectural support for lock-free data structures
ISCA '93 Proceedings of the 20th annual international symposium on computer architecture
Transactional lock-free execution of lock-based programs
Proceedings of the 10th international conference on Architectural support for programming languages and operating systems
Speculative synchronization: applying thread-level speculation to explicitly parallel applications
Proceedings of the 10th international conference on Architectural support for programming languages and operating systems
The Jrpm system for dynamically parallelizing Java programs
Proceedings of the 30th annual international symposium on Computer architecture
Transactional Memory Coherence and Consistency
Proceedings of the 31st annual international symposium on Computer architecture
Programming with transactional coherence and consistency (TCC)
ASPLOS XI Proceedings of the 11th international conference on Architectural support for programming languages and operating systems
Queue - Multiprocessors
Unbounded page-based transactional memory
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
Queue - Computer Architecture
DracoSTM: a practical C++ approach to software transactional memory
LCSD '07 Proceedings of the 2007 Symposium on Library-Centric Software Design
Implementation and evaluation of a microthread architecture
Journal of Systems Architecture: the EUROMICRO Journal
Evaluating CMPs and Their Memory Architecture
ARCS '09 Proceedings of the 22nd International Conference on Architecture of Computing Systems
Extending concurrency of transactional memory programs by using value prediction
Proceedings of the 6th ACM conference on Computing frontiers
Optimistic concurrency for clusters via speculative locking
SYSTOR '09 Proceedings of SYSTOR 2009: The Israeli Experimental Systems Conference
Limited early value communication to improve performance of transactional memory
Proceedings of the 23rd international conference on Supercomputing
The implementation of an SVP many-core processor and the evaluation of its memory architecture
ACM SIGARCH Computer Architecture News
Proactive transaction scheduling for contention management
Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture
Hardware transactional memory: A high performance parallel programming model
Journal of Systems Architecture: the EUROMICRO Journal
Journal of Parallel and Distributed Computing
Transactional memories for multi-processor FPGA platforms
Journal of Systems Architecture: the EUROMICRO Journal
Emulating transactional memory on FPGA multiprocessors
ARCS'11 Proceedings of the 24th international conference on Architecture of computing systems
Transactional prefetching: narrowing the window of contention in hardware transactional memory
Proceedings of the 21st international conference on Parallel architectures and compilation techniques
SCIN-cache: Fast speculative versioning in multithreaded cores
ACM Transactions on Architecture and Code Optimization (TACO) - Special Issue on High-Performance Embedded Architectures and Compilers
Towards load balanced distributed transactional memory
Euro-Par'12 Proceedings of the 18th international conference on Parallel Processing
Using Dynamic Runtime Testing for Rapid Development of Architectural Simulators
International Journal of Parallel Programming
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TCC simplifies parallel hardware and software design by eliminating the need for conventional cache coherence and consistency models and letting programmers parallelize a wide range of applications with a simple, lock-free transactional model.