Computer arithmetic algorithms
Computer arithmetic algorithms
Redundant Logarithmic Arithmetic
IEEE Transactions on Computers
Theory and Applications of the Double-Base Number System
IEEE Transactions on Computers
DRAM Circuit Design: A Tutorial
DRAM Circuit Design: A Tutorial
The Use of the Multi-Dimensional Logarithmic Number System in DSP Applications
ARITH '01 Proceedings of the 15th IEEE Symposium on Computer Arithmetic
Improving Accuracy in Mitchell's Logarithmic Multiplication Using Operand Decomposition
IEEE Transactions on Computers
EURASIP Journal on Applied Signal Processing
Improving 2D-log-number-system representations by use of an optimal base
EURASIP Journal on Advances in Signal Processing
A novel architecture for conversion of binary to single digit double base numbers
ACM SIGARCH Computer Architecture News
A RISC architecture for 2DLNS-based signal processing
International Journal of High Performance Systems Architecture
Conversion of binary to single-term triple base numbers for DSP applications
ACM SIGARCH Computer Architecture News
ACM SIGARCH Computer Architecture News
Performance analysis of a FPGA based novel binary and DBNS multiplier
ACM SIGARCH Computer Architecture News
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The Multidimensional Logarithmic Number System (MDLNS), which has similar properties to the classical Logarithmic Number System (LNS), provides more degrees of freedom than the LNS by virtue of having two, or more, orthogonal bases and has the ability to use multiple MDLNS components, or digits. Unlike the LNS, there is no monotonic relationship between standard binary representations and MDLNS representations. Using look-up tables (LUTs) to perform the mapping function can be unrealistic for hardware implementations when large binary ranges or multiple digits are used. This paper proposes a novel range-addressable technique for using look-up tables that allows efficient conversion from binary-to-single or multidigit MDLNS with varying accuracies, depending on the selected implementation.