Principles of CMOS VLSI design: a systems perspective
Principles of CMOS VLSI design: a systems perspective
Fault-tolerant computing: theory and techniques; vol. 1
Fault-tolerant computing: theory and techniques; vol. 1
Strongly Code Disjoint Checkers
IEEE Transactions on Computers
Reliability of majority voting based VLSI fault-tolerant circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
A Design Diversity Metric and Analysis of Redundant Systems
IEEE Transactions on Computers
A Time Redundancy Approach to TMR Failures Using Fault-State Likelihoods
IEEE Transactions on Computers
Experiments on Bridging Fault Analysis and Layout-Level DFT for CMOS Designs
Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems
Compact and low power on-line self-testing voting scheme
DFT '97 1997 Workshop on Defect and Fault-Tolerance in VLSI Systems
"Resistive Shorts" Within CMOS Gates
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
Bridging Defects Resistance Measurements in a CMOS Process
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
Word Voter: A New Voter Design for Triple Modular Redundant Systems
VTS '00 Proceedings of the 18th IEEE VLSI Test Symposium
Resistive Bridge Fault Modeling, Simulation and Test Generation
ITC '99 Proceedings of the 1999 IEEE International Test Conference
New High Speed CMOS Self-Checking Voter
IOLTS '04 Proceedings of the International On-Line Testing Symposium, 10th IEEE
Model for Transient Fault Susceptibility of Combinational Circuits
Journal of Electronic Testing: Theory and Applications
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In this paper we address the problem of faults possibly affecting voters of TMR systems and making them provide incorrect majority data, thus making the adoption of the TMR technique useless. We consequently instantiate the need for self-checking voting schemes and propose a new CMOS self-checking voter that, compared to alternate self-checking solutions, features the advantage of being faster, while requiring comparable power consumption and a small increase in area overhead.