Analysis of Gate Oxide Shorts in CMOS Circuits
IEEE Transactions on Computers
Symbolic Handling of Bridging Fault Effects
Journal of Electronic Testing: Theory and Applications
High Performance Fault-Tolerant Digital Neural Networks
IEEE Transactions on Computers
Detection of Defects Using Fault Model Oriented Test Sequences
Journal of Electronic Testing: Theory and Applications - Special issue on the IEEE European Test Workshop
Self-Checking Detection and Diagnosis of Transient, Delay, and Crosstalk Faults Affecting Bus Lines
IEEE Transactions on Computers
Bridging Faults in Pipelined Circuits
Journal of Electronic Testing: Theory and Applications
Highly testable and compact 1-out-of-n code checker with single output
Proceedings of the conference on Design, automation and test in Europe
Concurrent Checking of Clock Signal Correctness
IEEE Design & Test
On-line detection of logic errors due to crosstalk, delay, and transient faults
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Toward understanding "Iddq-only" fails
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Replacing IDDQ Testing: With Variance Reduction
Journal of Electronic Testing: Theory and Applications
On the development of power supply voltage control testing technique for analogue circuits
ATS '95 Proceedings of the 4th Asian Test Symposium
Built-in intermediate voltage testing for CMOS circuits
EDTC '95 Proceedings of the 1995 European conference on Design and Test
DFT '95 Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems
Highly testable and compact single output comparator
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
16.1 Novel Single and Double Output TSC Berger Code Checkers
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
ITC '00 Proceedings of the 2000 IEEE International Test Conference
Test Strategy Sensitivity to Defect Parameters
ITC '97 Proceedings of the 1997 IEEE International Test Conference
On-Line Testing Scheme for Clock's Faults
ITC '97 Proceedings of the 1997 IEEE International Test Conference
Revisiting the Classical Fault Models through a Detailed Analysis of Realistic Defects
ISQED '01 Proceedings of the 2nd International Symposium on Quality Electronic Design
Self-Checking Scheme for Very Fast Clocks' Skew Correction
ITC '99 Proceedings of the 1999 IEEE International Test Conference
A circuit level fault model for resistive bridges
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Proceedings of the 1st conference on Computing frontiers
High Speed and Highly Testable Parallel Two-Rail Code Checker
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Modeling Feedback Bridging Faults with Non-Zero Resistance
Journal of Electronic Testing: Theory and Applications
Testing for Resistive Shorts in FPGA Interconnects
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
Self-Checking Voter for High Speed TMR Systems
Journal of Electronic Testing: Theory and Applications
Functional constraints vs. test compression in scan-based delay testing
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Automatic Test Pattern Generation for Resistive Bridging Faults
Journal of Electronic Testing: Theory and Applications
Won't On-Chip Clock Calibration Guarantee Performance Boost and Product Quality?
IEEE Transactions on Computers
Functional Constraints vs. Test Compression in Scan-Based Delay Testing
Journal of Electronic Testing: Theory and Applications
Resistive bridging fault simulation of industrial circuits
Proceedings of the conference on Design, automation and test in Europe
SUPERB: Simulator utilizing parallel evaluation of resistive bridges
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Test escapes: analysis of short defect
SBCCI'99 Proceedings of the XIIth conference on Integrated circuits and systems design
System test cost modelling based on event rate analysis
ITC'94 Proceedings of the 1994 international conference on Test
Testing CMOS logic gates for realistic shorts
ITC'94 Proceedings of the 1994 international conference on Test
Defect classes - an overdue paradigm for CMOS IC testing
ITC'94 Proceedings of the 1994 international conference on Test
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