A chip prototyping substrate: the flexible architecture for simulation and testing (FAST)

  • Authors:
  • John D. Davis;Stephen E. Richardson;Charis Charitsis;Kunle Olukotun

  • Affiliations:
  • Stanford University;Stanford University;Stanford University;Stanford University

  • Venue:
  • ACM SIGARCH Computer Architecture News - Special issue: dasCMP'05
  • Year:
  • 2005

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Abstract

We describe a hybrid hardware emulation environment: the Flexible Architecture for Simulation and Testing (FAST). FAST integrates field-programmable gate arrays (FPGAs), microprocessors, and memory to enable rapid prototyping of chip multiprocessors, multithreaded architectures, or other novel computer architectures and chip-level memory systems. FAST combines configurable and fixed-function hardware and software to facilitate rapid prototyping by utilizing components optimized for their particular tasks: FPGAs for interconnect and glue logic; processors for rapid program execution; and SRAMs for fast memory. Unlike software simulators, FAST can simulate complex designs at multi-megahertz speeds regardless of the simulation detail. We illustrate FAST's utility by describing mappings of both a small-scale CMP with speculation support and a large-scale CMP connected using a network. We then show performance results from a very simple, decoupled 4-way CMP executing small test programs.