A BNF-based automatic test program generator for compatible microprocessor verification
ACM Transactions on Design Automation of Electronic Systems (TODAES)
VLIW: a case study of parallelism verification
Proceedings of the 42nd annual Design Automation Conference
First silicon functional validation and debug of multicore microprocessors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
MCjammer: adaptive verification for multi-core designs
Proceedings of the conference on Design, automation and test in Europe
Validating power architecture™ technology-based MPSoCs through executable specifications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Advances in simultaneous multithreading testcase generation methods
HVC'10 Proceedings of the 6th international conference on Hardware and software: verification and testing
CAV'10 Proceedings of the 22nd international conference on Computer Aided Verification
Fences in weak memory models (extended version)
Formal Methods in System Design
Targeted random test generation for power-aware multicore designs
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on verification challenges in the concurrent world
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We discuss collisions that are of interest to multiprocessor verification. Collisions occur when different processes access a shared resource. We investigate how the results of such collisions can be presented in test programs and suggest implementations for automatically generating such tests and predicting the results of collision scenarios. Most of the ideas presented are the result of years of experience with two multi-processor test generators from IBM (Genie and Genesys-Pro) which are also briefly presented.