Scheduler implementation in MP SoC design

Authors:
Youngchul Cho;Sungjoo Yoo;Kiyoung Choi;Nacer-Eddine Zergainoh;Ahmed Amine Jerraya
Affiliations:
Seoul National University, Seoul, Korea;Samsung Electronics, Soowon, Korea;Seoul National University, Seoul, Korea;SLS group - TIMA Laboratory, Grenoble, France;SLS group - TIMA Laboratory, Grenoble, France
Venue:
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Year:
2005

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Abstract

In the design of a heterogeneous multiprocessor system on chip, we face a new design problem; scheduler implementation. In this paper, we present an approach to implementing a static scheduler, which controls all the task executions and communication transactions of a system according to a pre-determined schedule. For the scheduler implementation, we consider both intra-processor and inter-processor synchronization. We also consider scheduler overhead, which is often neglected. In particular, we address the issue of centralized implementation versus distributed implementation. We investigate the pros and cons of the two different scheduler implementations. Through experiments with synthetic examples and a real world multimedia application, we show the effectiveness of our approach.