LEneS: task scheduling for low-energy systems using variable supply voltage processors
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Optimizing compilers for modern architectures: a dependence-based approach
Optimizing compilers for modern architectures: a dependence-based approach
Energy-conscious compilation based on voltage scaling
Proceedings of the joint conference on Languages, compilers and tools for embedded systems: software and compilers for embedded systems
Task scheduling and voltage selection for energy minimization
Proceedings of the 39th annual Design Automation Conference
Low power system scheduling and synthesis
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
A realistic variable voltage scheduling model for real-time applications
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Battery-Driven System Design: A New Frontier in Low Power Design
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Energy-Efficient Mapping and Scheduling for DVS Enabled Distributed Embedded Systems
Proceedings of the conference on Design, automation and test in Europe
IEEE Transactions on Parallel and Distributed Systems
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Compiler-directed dynamic voltage and frequency scaling for cpu power and energy reduction
Compiler-directed dynamic voltage and frequency scaling for cpu power and energy reduction
Communication-Aware Task Scheduling and Voltage Selection for Total Systems Energy Minimization
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
The design and application of the PowerPC 405LP energy-efficient system-on-a-chip
IBM Journal of Research and Development
Scheduling and Mapping of Conditional Task Graphs for the Synthesis of Low Power Embedded Systems
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Operating System Modifications for Task-Based Speed and Voltage
Proceedings of the 1st international conference on Mobile systems, applications and services
ACM SIGARCH Computer Architecture News - Special issue: ALPS '07---advanced low power systems
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Dynamic voltage scaling (DVS) is an effective method for reducing processor power consumption. We present a compiler-based technique for DVS-based power optimizations of multimedia applications in the context of the Multi-Level Computing Architecture (MLCA) a novel architecture for parallel systems-on-a-chip. Our technique combines dependence analysis of long-running loops with profiling information in order to identify the slack available in the execution of parallel tasks. DVS is then applied to slow down processors executing noncritical-path tasks, reducing power with little or no impact on execution time. We evaluate our technique using realistic multimedia applications and a simulator of the MLCA. The results demonstrate that up to 10% savings in processor power consumption can be achieved with no more than 1.5% increase in execution time. Although our technique is developed in the context of MLCA, we believe that it is applicable in the broader context of task-level parallelism in multimedia applications.