Design of High-Performance Microprocessor Circuits
Design of High-Performance Microprocessor Circuits
The Case for Lifetime Reliability-Aware Microprocessors
Proceedings of the 31st annual international symposium on Computer architecture
An electromigration and thermal model of power wires for a priori high-level reliability prediction
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Interconnect lifetime prediction under dynamic stress for reliability-aware design
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
ElastIC: An Adaptive Self-Healing Architecture for Unpredictable Silicon
IEEE Design & Test
NBTI resilient circuits using adaptive body biasing
Proceedings of the 18th ACM Great Lakes symposium on VLSI
Vicis: a reliable network for unreliable silicon
Proceedings of the 46th Annual Design Automation Conference
Post-fabrication measurement-driven oxide breakdown reliability prediction and management
Proceedings of the 2009 International Conference on Computer-Aided Design
SRAM-based NBTI/PBTI sensor system design
Proceedings of the 47th Design Automation Conference
NBTI modeling in the framework of temperature variation
Proceedings of the Conference on Design, Automation and Test in Europe
Process variation and temperature-aware reliability management
Proceedings of the Conference on Design, Automation and Test in Europe
A highly resilient routing algorithm for fault-tolerant NoCs
Proceedings of the Conference on Design, Automation and Test in Europe
Analysis and optimization of NBTI induced clock skew in gated clock trees
Proceedings of the Conference on Design, Automation and Test in Europe
System-level reliability modeling for MPSoCs
CODES/ISSS '10 Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Power agnostic technique for efficient temperature estimation of multicore embedded systems
Proceedings of the 2012 international conference on Compilers, architectures and synthesis for embedded systems
Reliability-Aware Proactive Energy Management in Hard Real-Time Systems: A Motivational Case Study
International Journal of Adaptive, Resilient and Autonomic Systems
International Journal of Adaptive, Resilient and Autonomic Systems
Workload and user experience-aware dynamic reliability management in multicore processors
Proceedings of the 50th Annual Design Automation Conference
Compact degradation sensors for monitoring NBTI and oxide degradation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Reliability failure mechanisms, such as time dependent dielectric breakdown, electromigration, and thermal cycling have become a key concern in processor design. The traditional approach to reliability qualification assumes that the processor will operate at maximum performance continuously under worst case voltage and temperature conditions. However, the typical processor spends a very small fraction of its operational time at maximum voltage and temperature. In this paper, we show how this results in a reliability "slack" that can be leveraged to provide increased performance during periods of peak processor demand. We develop a novel, real time reliability model based on workload driven conditions. We then propose a new dynamic reliability management (DRM) scheme that results in 20-35% performance improvement during periods of peak computational demand while ensuring the required reliability lifetime.