Microwave transistor amplifiers (2nd ed.): analysis and design
Microwave transistor amplifiers (2nd ed.): analysis and design
Analysis and Design of Analog Integrated Circuits
Analysis and Design of Analog Integrated Circuits
On the Testability of CMOS Feedback Amplifiers
Proceedings of the The IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems
CMOS Standard Cells Characterization for Defect Based Testing
DFT '01 Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems
A Bulti-in Self-Test Strategy for Wireless Communication Systems
Proceedings of the IEEE International Test Conference on Driving Down the Cost of Test
A Signature Test Framework for Rapid Production Testing of RF Circuits
Proceedings of the conference on Design, automation and test in Europe
BiST Model for IC RF-Transceiver Front-End
DFT '03 Proceedings of the 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
RF-BIST: Loopback Spectral Signature Analysis
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
A New BIST Scheme for 5GHz Low Noise Amplifiers
ETS '04 Proceedings of the European Test Symposium, Ninth IEEE
Mismatch reduction technique for transistors with minimum channel length
Analog Integrated Circuits and Signal Processing
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This paper presents a new RF testing scheme based on a design-for-testability (DFT) method for measuring functional specifications of RF integrated circuits (IC). The proposed method provides the input impedance, gain, noise figure, voltage standing wave ratio (VSWR) and output signal-to-noise ratio (SNR) of a low noise amplifier (LNA). The RF test scheme is based on theoretical expressions that produce the actual RF device specifications by utilizing the output DC voltages from the DFT chip. This technique can save marginally failing chips in production testing as well as in the system, hence saving a tremendous amount of revenue from unnecessary device replacements.