A timing analysis of level-clocked circuitry

Computing optimal clock schedules

DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference

A verification technique for gated clock

DAC '93 Proceedings of the 30th international Design Automation Conference

TIM: a timing package for two-phase, level-clocked circuitry

DAC '93 Proceedings of the 30th international Design Automation Conference

Automated multi-cycle symbolic timing verification of microprocessor-based designs

DAC '94 Proceedings of the 31st annual Design Automation Conference

Rephasing: a transformation technique for the manipulation of timing constraints

DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference

Optimizing two-phase, level-clocked circuitry

Journal of the ACM (JACM)

Retiming gated-clocks and precharged circuit structures

ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design

Verifying clock schedules

ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design

On the performance of level-clocked circuits

ARVLSI '95 Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI'95)