Modern operating systems
Protocol selection and interface generation for HW-SW codesign
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Policy optimization for dynamic power management
DAC '98 Proceedings of the 35th annual Design Automation Conference
Communication synthesis for distributed embedded systems
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Dynamic power management for non-stationary service requests
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Dynamic power management based on continuous-time Markov decision processes
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Dynamic power management of complex systems using generalized stochastic Petri nets
Proceedings of the 37th Annual Design Automation Conference
Efficient resource arbitration in reconfigurable computing environments
DATE '00 Proceedings of the conference on Design, automation and test in Europe
System-level synthesis
Constraint-driven communication synthesis
Proceedings of the 39th annual Design Automation Conference
Computer Networks and Systems: Queueing Theory and Performance Evaluation
Computer Networks and Systems: Queueing Theory and Performance Evaluation
Efficient exploration of the SoC communication architecture design space
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
System-Level Point-to-Point Communication Synthesis Using Floorplanning Information
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Bus Architecture Synthesis for Hardware-Software Co-Design of Deep Submicron Systems on Chip
ICCD '03 Proceedings of the 21st International Conference on Computer Design
Layout Conscious Bus Architecture Synthesis for Deep Submicron Systems on Chip
Proceedings of the conference on Design, automation and test in Europe - Volume 1
On-chip traffic modeling and synthesis for MPEG-2 video applications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Early analysis tools for system-on-a-chip design
IBM Journal of Research and Development
On-Chip Stochastic Communication
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Theory, Volume 1, Queueing Systems
Theory, Volume 1, Queueing Systems
Towards on-chip fault-tolerant communication
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Stochastic modeling of a power-managed system-construction and optimization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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In this article we implement a stochastic modeling technique for simulating the communication between processors and arbitration among buses for an embedded SoC. The stochastic models implemented with queues have been used to estimate, through simulation of different arbitration policies, the power consumption and delays, as well as estimate average or worst case scenarios that could occur with different architectures and arbitration policies . This idea could then be extended to writing probabilistic test benches to analyze the performance of different architectures as well as device and test arbitration policies which would attempt to optimize the power consumption and buffer lengths with constraints on the average delay.