Proceedings of the conference on Design, automation and test in Europe
Addressing the system-on-a-chip interconnect woes through communication-based design
Proceedings of the 38th annual Design Automation Conference
System Design with SystemC
Fast exploration of bus-based on-chip communication architectures
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
IPSIM: SystemC 3.0 Enhancements for Communication Refinement
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
System-level communication modeling for network-on-chip synthesis
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Quantitative analysis of transaction level models for the AMBA bus
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Accurate yet fast modeling of real-time communication
CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
On-Chip Communication Architectures: System on Chip Interconnect
On-Chip Communication Architectures: System on Chip Interconnect
Accuracy-adaptive simulation of transaction level models
Proceedings of the conference on Design, automation and test in Europe
A platform-based design framework for joint SW/HW multiprocessor systems design
Journal of Systems Architecture: the EUROMICRO Journal
Modeling constructs and kernel for parallel simulation of accuracy adaptive TLMs
Proceedings of the Conference on Design, Automation and Test in Europe
Speeding up SoC virtual platform simulation by data-dependency-aware synchronization and scheduling
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Analytical timing estimation for temporally decoupled TLMs considering resource conflicts
Proceedings of the Conference on Design, Automation and Test in Europe
| Hi-index | 0.00 |
Effcient communication modeling is a critical task in SoC design and exploration. In particular, fast and accurate communication is needed to predict the performance of a system. Recently, Transaction Level Modeling (TLM) is used to speedup communication simulation at the cost of accuracy. This paper proposes a novel modeling technique called Result Oriented Modeling (ROM) which removes the accuracy drawback of TLM. Using ROM, models yield the same speed as their TLM counterparts, yet still are 100% accurate in timing. ROM utilizes the fact that internal states in the communication channel are not observable by the caller. Hence, ROM omits the internal states entirely and optimistically predicts the end result. Retroactively, the outcome is checked and, if necessary, corrective measures are taken to maintain the accuracy of the model. In this paper, we apply ROM to the AMBA AHB bus architecture. Our experimental results show that ROM exhibits the same high simulation performance as traditional TLM, yet it retains the same accuracy as the bus functional model. Thus, the proposed ROM approach eliminates the speed/accuracy tradeoff exhibited by traditional TLM.