A one-shot configurable-cache tuner for improved energy and performance

  • Authors:
  • Ann Gordon-Ross;Pablo Viana;Frank Vahid;Walid Najjar;Edna Barros

  • Affiliations:
  • University of California, Riverside;Universidade Federal de Alagoas, Arapiraca-AL, Brazil and University of California, Irvine;University of California, Riverside;University of California, Riverside;Federal University of Pernambuco, Recife-PE, Brazil

  • Venue:
  • Proceedings of the conference on Design, automation and test in Europe
  • Year:
  • 2007

Quantified Score

Hi-index 0.00

Visualization

Abstract

We introduce a new non-intrusive on-chip cache-tuning hardware module capable of accurately predicting the best configuration of a configurable cache for an executing application. Previous dynamic cache tuning approaches change the cache configuration several times as part of the tuning search process, executing the application using inferior configurations and temporarily causing energy and performance overhead. The introduced tuner uses a different approach, which non-intrusively collects data on addresses issued by the microprocessor, analyzes that data to predict the best cache configuration, and then updates the cache to the new best configuration in "one-shot," without ever having to examine inferior configurations. The result is less energy and less performance overhead, meaning that cache tuning can be applied more frequently. We show through experiments that the one-shot cache tuner can reduce memory-access related energy for instructions by 35% and comes within 4% of a previous intrusive approach, and results in 4.6 times less energy overhead and a 7.7 times speedup in tuning time compared to a previous intrusive approach, at the main expense of 12% larger size.