Fast address lookups using controlled prefix expansion
ACM Transactions on Computer Systems (TOCS)
Logic Minimization Algorithms for VLSI Synthesis
Logic Minimization Algorithms for VLSI Synthesis
Fast Updating Algorithms for TCAMs
IEEE Micro
Routing Table Compaction in Ternary CAM
IEEE Micro
Proceedings of the 40th annual Design Automation Conference
Reducing TCAM Power Consumption and Increasing Throughput
HOTI '02 Proceedings of the 10th Symposium on High Performance Interconnects HOT Interconnects
A TCAM based routing lookup system
ICCC '02 Proceedings of the 15th international conference on Computer communication
Routing Table Partitioning for Speedy Packet Lookups in Scalable Routers
IEEE Transactions on Parallel and Distributed Systems
A 2-Level TCAM Architecture for Ranges
IEEE Transactions on Computers
A one-shot configurable-cache tuner for improved energy and performance
Proceedings of the conference on Design, automation and test in Europe
An efficient approach to on-chip logic minimization
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Ternary CAM power and delay model: extensions and uses
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A low-power ternary CAM with positive-feedback match-line sense amplifiers
IEEE Transactions on Circuits and Systems Part I: Regular Papers
A new IP lookup cache for high performance IP routers
Proceedings of the 47th Design Automation Conference
A memory- and time-efficient on-chip TCAM minimizer for IP lookup
Proceedings of the Conference on Design, Automation and Test in Europe
Testing comparison and delay faults of TCAMs with asymmetric cells
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Low-leakage storage cells for ternary content addressable memories
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
An efficient IP address lookup algorithm based on a small balanced tree using entry reduction
Computer Networks: The International Journal of Computer and Telecommunications Networking
A comparative review of scalable lookup algorithms for IPv6
Computer Networks: The International Journal of Computer and Telecommunications Networking
Towards TCAM-based scalable virtual routers
Proceedings of the 8th international conference on Emerging networking experiments and technologies
| Hi-index | 14.98 |
Ternary Content Addressable Memories (TCAMs) have been emerging as a popular device in designing routers for packet forwarding and classifications. Despite their premise on high-throughput, large TCAM arrays are prohibitive due to their excessive power consumption and lack of scalable design schemes. This paper presents a TCAM-based router architecture that is energy and storage efficient. We introduce prefix aggregation and expansion techniques to compact the effective TCAM size in a router. Pipelined and paging schemes are employed in the architecture to activate a limited number of entries in the TCAM array during an IP lookup. The new architecture provides low power, fast incremental updating, and fast table look-up. Heuristic algorithms for page filling, fast prefix update, and memory management are also provided. Results have been illustrated with two large routers (bbnplanet and attcanada) to demonstrate the effectiveness of our approach.