Modeling and forecasting of manufacturing variations (embedded tutorial)
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Parameter variations and impact on circuits and microarchitecture
Proceedings of the 40th annual Design Automation Conference
Impact of Design-Manufacturing Interface on SoC Design Methodologies
IEEE Design & Test
A Data-Driven Statistical Approach to Analyzing Process Variation in 65nm SOI Technology
ISQED '07 Proceedings of the 8th International Symposium on Quality Electronic Design
Statistical diagnosis of unmodeled systematic timing effects
Proceedings of the 45th annual Design Automation Conference
Path selection for monitoring unexpected systematic timing effects
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
A statistical diagnosis approach for analyzing design-silicon timing mismatch
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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This paper presents a statistical framework to cooperatively design and develop technology, product circuit, benchmarking and model early in the development stage. The statistical data-driven approach identifies device characteristics that are most correlated with a product performance, and estimates performance yield. A statistical method that isolates systematic process variations on die-to-die and wafer-to-wafer levels is also presented. The proposed framework enables translations of interactions among technology, product, and model, and facilitates collaborative efforts accordingly. The proposed methodology has been applied to first three development generations of 65nm technology node and microprocessor product current-controlled oscillators (ICOs) for phase-locked loops (PLLs) that were migrated from 90nm. Automated manufacturing floor in-line characterization and bench RF measurements are used for the methodology. The ICO exhibits yield improvement of RF oscillation frequency from 47% to 99% across three different 65nm SOI technology generations.