Transition Count Testing of Combinational Logic Circuits
IEEE Transactions on Computers
Probabilistic Analysis of Random Test Generation Method for Irredundant Combinational Logic Networks
IEEE Transactions on Computers
The Weighted Random Test-Pattern Generator
IEEE Transactions on Computers
Analyzing Errors with the Boolean Difference
IEEE Transactions on Computers
A Random and an Algorithmic Technique for Fault Detection Test Generation for Sequential Circuits
IEEE Transactions on Computers
Algorithms for Detection of Faults in Logic Circuits
IEEE Transactions on Computers
Derivation of optimum test sequencies for sequential machines
SWCT '64 Proceedings of the 1964 Proceedings of the Fifth Annual Symposium on Switching Circuit Theory and Logical Design
IEEE Transactions on Computers
An Analysis of the Use of Rademacher-Walsh Spectrum in Compact Testing
IEEE Transactions on Computers
The coverage problem for random testing
ITC'84 Proceedings of the 1984 international test conference on The three faces of test: design, characterization, production
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Random compact testing uses random inputs to test digital circuits. Fault detection can be achieved by comparing some statistic of the circuit under test, e.g., the frequency of logic ones at an output, with the value of that statistic previously determined for the fault-free circuit. In this paper, we show that random compact testing can efficiently detect failures in both combinational and sequential circuits. Although this testing method cannot guarantee detection of all faults, it provides a simple way to detect the vast majority of failures in most circuits. The effects of failures inside combinational circuits are modeled in relation to the statistical property measured by the test and a general evaluation of the testing efficiency is obtained. The probability of detection is shown to increase with the test length and to be dependent upon test parameters such as the statistics of the input sequence. For sequential circuits, the uncertainty of the initial state necessitates an initialization step, which is a long sequence of random inputs. The length of such an initialization sequence is circuit dependent, but for most circuits, proper initialization can be achieved in a few seconds. Most failures inside the memory elements are easily detected, even with short tests. Random compact testing can also detect most of the failures inside the excitation logic and the output circuitry. There, as for combinational circuits, its efficiency is largely dependent upon the test length. Some of the requirements and tradeoffs to achieve efficient detection are presented.