T01A-programming languages: T01A5-Computer-aided boolean algebra
CSC '74 Proceedings of the 2nd annual computer science conference on Program information abstracts
Derivation of Minimal Complete Sets of Test-Input Sequences Using Boolean Differences
IEEE Transactions on Computers
Undetectability of Bridging Faults and Validity of Stuck-At Fault Test Sets
IEEE Transactions on Computers
Design for Testability A Survey
IEEE Transactions on Computers
The Boolean Difference and Multiple Fault Analysis
IEEE Transactions on Computers
Algebraic Fault Analysis for Constrained Combinational Networks
IEEE Transactions on Computers
Multiple Fault Detection for Combinational Logic Circuits
IEEE Transactions on Computers
9-V Algorithm for Test Pattern Generation of Combinational Digital Circuits
IEEE Transactions on Computers
An Implicit Enumeration Algorithm to Generate Tests for Combinational Logic Circuits
IEEE Transactions on Computers
Correction to "Analyzing Errors with the Boolean Difference"1
IEEE Transactions on Computers
On Combinational Networks with Restricted Fan-Out
IEEE Transactions on Computers
Boolean Differential Calculus and its Application to Switching Theory
IEEE Transactions on Computers
Diversified Test Methods for Local Control Units
IEEE Transactions on Computers
Analysis of Logic Circuits with Faults Using Input Signal Probabilities
IEEE Transactions on Computers
Optimal Detection of Bridge Faults and Stuck-At Faults in Two-Level Logic
IEEE Transactions on Computers
Optimal Test Generation in Combinational Networks by Pseudo-Boolean Programming
IEEE Transactions on Computers
Efficiency of Random Compact Testing
IEEE Transactions on Computers
Processor Testability and Design Consequences
IEEE Transactions on Computers
Probabilistic Analysis of Random Test Generation Method for Irredundant Combinational Logic Networks
IEEE Transactions on Computers
Test Generation Algorithms for Computer Hardware Description Languages
IEEE Transactions on Computers
Vector Boolean Algebra and Calculus
IEEE Transactions on Computers
Meet and Join Derivatives and Their Use in Switching Theory
IEEE Transactions on Computers
Dynamic Testing of Redundant Logic Networks
IEEE Transactions on Computers
Comments on "Derivation of Minimal Complete Sets of Test-Input Sequences Using Boolean Differences"
IEEE Transactions on Computers
Resolution-Oriented Fault Interrelationships in Combinational Logic Networks
IEEE Transactions on Computers
On the Acceleration of Test Generation Algorithms
IEEE Transactions on Computers
SAT-based ATPG using multilevel compatible don't-cares
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A method of diagnostic test generation
AFIPS '69 (Spring) Proceedings of the May 14-16, 1969, spring joint computer conference
The design of self-checking multi-output combinational circuits
AFIPS '77 Proceedings of the June 13-16, 1977, national computer conference
International Journal of Computer Mathematics
Circuit Structure and Switching Function Verification
IEEE Transactions on Computers
Reliability, availability, and serviceability of IBM computer systems: a quarter century of progress
IBM Journal of Research and Development
A method to generate tests for combinational logic circuits using an ultrahigh-speed logic simulator
ITC'88 Proceedings of the 1988 international conference on Test: new frontiers in testing
LSI logic testing: an overview
IEEE Transactions on Computers
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Abstract The Boolean difference is defined. It is shown through example how the Boolean difference is used to analyze the effect of errors on the outputs of logic circuits. Examples are given of error detection problems, analysis of redundant logic, and the generation of diagnostic sequences.