On the Existence of Combinational Logic Circuits Exhibiting Multiple Redundancy

Authors:
J. E. Smith
Affiliations:
Department of Electrical and Computer Engineering, University of Wisconsin
Venue:
IEEE Transactions on Computers
Year:
1978

Citing 7
Cited 1

Multiple Fault Detection in Combinational Networks

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The Boolean Difference and Multiple Fault Analysis

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Fault Masking in Combinational Logic Circuits

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Minimal Fault Tests for Combinational Networks

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Redundancy Testing in Combinational Networks

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Cause-Effect Analysis for Multiple Fault Detection in Combinational Networks

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Detection of Multiple Faults in Combinational Logic Networks

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Multiple Fault Diagnosis in Combinational Circuits Based on an Effect-Cause Analysis

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Abstract

Multiple redundancy is a very complex form of redundancy about which little is known. This correspondence shows by construction that redundancy of any multiplicity can exist in an arbitrary combinational circuit, and that redundancy of any multiplicity = 4 can exist in a tree circuit. Many examples are given. The correspondence concludes with a discussion of the effect multiple redundancy can have on multiple fault testing. It is shown that with a proper algorithm multiple redundancy can actually cause fewer problems than single redundancy does when single fault testing is being considered.