A Synthesizable Datapath-Oriented Embedded FPGA Fabric for Silicon Debug Applications

  • Authors:
  • Steven J.E. Wilton;Chun Hok Ho;Bradley Quinton;Philip H.W. Leong;Wayne Luk

  • Affiliations:
  • University of British Columbia;Imperial College London;University of British Columbia;Chinese University of Hong Kong;Imperial College London

  • Venue:
  • ACM Transactions on Reconfigurable Technology and Systems (TRETS) - Special edition on the 15th international symposium on FPGAs
  • Year:
  • 2008

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Abstract

We present an architecture for a synthesizable datapath-oriented FPGA core that can be used to provide post-fabrication flexibility to an SoC. Our architecture is optimized for bus-based operations and employs a directional routing architecture, which allows it to be synthesized using standard ASIC design tools and flows. The primary motivation for this architecture is to provide an efficient mechanism to support on-chip debugging. The fabric can also be used to implement other datapath-oriented circuits such as those needed in signal processing and computation-intensive applications. We evaluate our architecture using a set of benchmark circuits and compare it to previous fabrics in terms of area, speed, and power.