Quantum computation and quantum information
Quantum computation and quantum information
Quantum-Dot Cellular Automata (QCA) circuit partitioning: problem modeling and solutions
Proceedings of the 41st annual Design Automation Conference
VLSID '05 Proceedings of the 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design
Synthesis of fredkin-toffoli reversible networks
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Testing of quantum cellular automata
IEEE Transactions on Nanotechnology
A method of majority logic reduction for quantum cellular automata
IEEE Transactions on Nanotechnology
Fault testing for reversible circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Design of reversible sequential circuits optimizing quantum cost, delay, and garbage outputs
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Design of efficient reversible logic-based binary and BCD adder circuits
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Mach-zehnder interferometer based design of all optical reversible binary adder
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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An extensive literature exists on the mathematical characterization of reversible logic. However, the possible technological basis of this computing paradigm still remains unsolved. In this paper, quantum-dot cellular automata (QCA) is investigated for testable implementations of reversible logic. Two new reversible gates (referred to as QCA1 and QCA2) are proposed. These gates are compared (in terms of delay, area and logic synthesis) with other reversible gates (such as Toffoli and Fredkin) for QCA implementation. Due to the expected high error rates in nano-scale manufacturing, testing of nano devices, including QCA, has received considerable attention. The focus of this paper is on the testability of a one-dimensional array made of QCA reversible gates, because the bijective nature of reversible gates significantly facilitates testing of arrays. The investigation of testability relies on a fault model for molecular QCA that is based on a single missing/additional cell assumption. It is shown that C-testability of a 1D reversible QCA gate array can be guaranteed for single fault. Theory and circuit examples show that error masking can occur when multiple faults are considered.