Reversible Gates and Testability of One Dimensional Arrays of Molecular QCA
Journal of Electronic Testing: Theory and Applications
Proceedings of the conference on Design, automation and test in Europe
Detecting Multiple Faults in One-Dimensional Arrays of Reversible QCA Gates
Journal of Electronic Testing: Theory and Applications
On the fault testing for reversible circuits
ISAAC'07 Proceedings of the 18th international conference on Algorithms and computation
Reducing the number of lines in reversible circuits
Proceedings of the 47th Design Automation Conference
Proceedings of the Conference on Design, Automation and Test in Europe
Universal test sets for reversible circuits
COCOON'10 Proceedings of the 16th annual international conference on Computing and combinatorics
Integration, the VLSI Journal
Fault Models for Quantum Mechanical Switching Networks
Journal of Electronic Testing: Theory and Applications
Fault diagnosis in reversible circuits under missing-gate fault model
Computers and Electrical Engineering
RevKit: an open source toolkit for the design of reversible circuits
RC'11 Proceedings of the Third international conference on Reversible Computation
Online Testable Approaches in Reversible Logic
Journal of Electronic Testing: Theory and Applications
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Applications of reversible circuits can be found in the fields of low-power computation, cryptography, communications, digital signal processing, and the emerging field of quantum computation. Furthermore, prototype circuits for low-power applications are already being fabricated in CMOS. Regardless of the eventual technology adopted, testing is sure to be an important component in any robust implementation. We consider the test-set generation problem. Reversibility affects the testing problem in fundamental ways, making it significantly simpler than for the irreversible case. For example, we show that any test set that detects all single stuck-at faults in a reversible circuit also detects all multiple stuck-at faults. We present efficient test-set constructions for the standard stuck-at fault model, as well as the usually intractable cell-fault model. We also give a practical test-set generation algorithm, based on an integer linear programming formulation, that yields test sets approximately half the size of those produced by conventional automatic test pattern generation.