Power-aware scheduling under timing constraints for mission-critical embedded systems
Proceedings of the 38th annual Design Automation Conference
Approximation algorithms
Task scheduling and voltage selection for energy minimization
Proceedings of the 39th annual Design Automation Conference
Temperature-aware microarchitecture
Proceedings of the 30th annual international symposium on Computer architecture
Full chip leakage estimation considering power supply and temperature variations
Proceedings of the 2003 international symposium on Low power electronics and design
Proceedings of the conference on Design, automation and test in Europe - Volume 1
The Case for Lifetime Reliability-Aware Microprocessors
Proceedings of the 31st annual international symposium on Computer architecture
Heat-and-run: leveraging SMT and CMP to manage power density through the operating system
ASPLOS XI Proceedings of the 11th international conference on Architectural support for programming languages and operating systems
Thermal-Aware Task Allocation and Scheduling for Embedded Systems
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Power-aware scheduling and dynamic voltage setting for tasks running on a hard real-time system
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Proceedings of the conference on Design, automation and test in Europe: Proceedings
A fast HW/SW FPGA-based thermal emulation framework for multi-processor system-on-chip
Proceedings of the 43rd annual Design Automation Conference
Temperature aware task scheduling in MPSoCs
Proceedings of the conference on Design, automation and test in Europe
Thermal-aware task scheduling at the system software level
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
Optimization of reliability and power consumption in systems on a chip
PATMOS'05 Proceedings of the 15th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
Modeling and analysis of nonuniform substrate temperature effects on global ULSI interconnects
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Performance and energy efficient cache migrationapproach for thermal management in embedded systems
Proceedings of the 20th symposium on Great lakes symposium on VLSI
Recent thermal management techniques for microprocessors
ACM Computing Surveys (CSUR)
COOL: control-based optimization of load-balancing for thermal behavior
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Achieving autonomous power management using reinforcement learning
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Reliable on-chip systems in the nano-era: lessons learnt and future trends
Proceedings of the 50th Annual Design Automation Conference
TempoMP: integrated prediction and management of temperature in heterogeneous MPSoCs
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Run-time adaption for highly-complex multi-core systems
Proceedings of the Ninth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis
Performance-driven dynamic thermal management of MPSoC based on task rescheduling
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Hi-index | 0.00 |
Thermal hot spots and temperature gradients on the die need to be minimized to manufacture reliable systems while meeting energy and performance constraints. In this work, we solve the task scheduling problem for multiprocessor system-on-chips (MPSoCs) using Integer Linear Programming (ILP). The goal of our optimization is minimizing the hot spots and balancing the temperature distribution on the die for a known set of tasks. Under the given assumptions about task characteristics, the solution is optimal. We compare our technique against optimal scheduling methods for energy minimization, energy balancing, and hot spot minimization, and show that our technique achieves significantly better thermal profiles. We also extend our technique to handle workload variations at runtime.