Temperature-aware microarchitecture
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Real Time Optimization by Extremum Seeking Control
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The thermal behavior of on-chip systems is crucial in order to maintain a reliable operation throughout its lifetime. Potential thermal hotspots like, for example, register files are particularly responsible for unreliable behavior and have therefore been the focus of related research. Within this paper we demonstrate that a pro-active thermal strategy is necessary in order to avoid thermal hotspots by performing load balancing -- in regards to the temperature produced by the computational load -- through the means of activity migration. We have found that extremum-seeking control is a powerful way to achieve this goal because of its properties that are tailored to the thermal management problem. Our work deploys a thermal camera that captures the infrared emissions from the silicon wafer of an FPGA chip enabling us to accurately analyze and evaluate the impact of our load-balancing approach with respect to the chip's thermal behavior. The obtained reduction of peak temperature is 9°C and the reduction in thermal spatial variation is from 6°C to 1°C. We additionally apply extremum-seeking control to the register file of a superscalar ASIC microarchitecture. Our results using thermal simulation show on average a 13°C (up to 21°C) reduction of peak temperature in the register file while exhibiting a 49% reduction in thermal spatial variation compared to State-of-the-Art while incurring an average performance penalty of 1.4% but without increasing the area footprint of the register file.