A survey of design techniques for system-level dynamic power management
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on low-power electronics and design
Real-time dynamic voltage scaling for low-power embedded operating systems
SOSP '01 Proceedings of the eighteenth ACM symposium on Operating systems principles
Predictive dynamic thermal management for multimedia applications
ICS '03 Proceedings of the 17th annual international conference on Supercomputing
Performance Comparison of Dynamic Voltage Scaling Algorithms for Hard Real-Time Systems
RTAS '02 Proceedings of the Eighth IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS'02)
Temperature-aware microarchitecture
Proceedings of the 30th annual international symposium on Computer architecture
HPCA '02 Proceedings of the 8th International Symposium on High-Performance Computer Architecture
Hybrid Architectural Dynamic Thermal Management
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Compact thermal modeling for temperature-aware design
Proceedings of the 41st annual Design Automation Conference
Reliability and Power Management of Integrated Systems
DSD '04 Proceedings of the Digital System Design, EUROMICRO Systems
MPARM: Exploring the Multi-Processor SoC Design Space with SystemC
Journal of VLSI Signal Processing Systems
Power-aware scheduling and dynamic voltage setting for tasks running on a hard real-time system
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Optimization of reliability and power consumption in systems on a chip
PATMOS'05 Proceedings of the 15th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
A tool flow for predicting system level timing failures due to interconnect reliability degradation
Proceedings of the 18th ACM Great Lakes symposium on VLSI
ESL power analysis of embedded processors for temperature and reliability estimations
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
COOL: control-based optimization of load-balancing for thermal behavior
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
On the Simulation of HCI-Induced Variations of IC Timings at High Level
Journal of Electronic Testing: Theory and Applications
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Reliability has become a significant challenge for system design in new process technologies. Higher integration levels dramatically increase power densities, which leads to higher temperature and adverse effects on reliability. In this paper, we introduce a simulation methodology to analyze reliability of multi-core SoCs. The proposed simulator is the first to provide system-on-chip level fine-grained reliability analysis. We use our simulation methodology to study the reliability effects of design choices such as thermal packaging and placement, as well as runtime events such as power management policies and workload distributions.