Power analysis of embedded software: a first step towards software power minimization
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
An overview of hierarchical control flow graph models
WSC '95 Proceedings of the 27th conference on Winter simulation
State-based power analysis for systems-on-chip
Proceedings of the 40th annual Design Automation Conference
Task Graph Scheduling Using Timed Automata
IPDPS '03 Proceedings of the 17th International Symposium on Parallel and Distributed Processing
Analyzing On-Chip Communication in a MPSoC Environment
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Temperature-aware microarchitecture: Modeling and implementation
ACM Transactions on Architecture and Code Optimization (TACO)
Efficient library characterization for high-level power estimation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
A simulation methodology for reliability analysis in multi-core SoCs
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
Exploring "temperature-aware" design in low-power MPSoCs
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Control-Flow Aware Communication and Conflict Analysis of Parallel Processes
ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
High-performance timing simulation of embedded software
Proceedings of the 45th annual Design Automation Conference
Temperature-aware scheduling and assignment for hard real-time applications on MPSoCs
Proceedings of the conference on Design, automation and test in Europe
Methodology for multi-granularity embedded processor power model generation for an ESL design flow
CODES+ISSS '08 Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis
System-level power estimation using an on-chip bus performance monitoring unit
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Static and dynamic temperature-aware scheduling for multiprocessor SoCs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
System-Level Dynamic Thermal Management for High-Performance Microprocessors
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Design and architectures for dependable embedded systems
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Cross-Level compositional reliability analysis for embedded systems
SAFECOMP'12 Proceedings of the 31st international conference on Computer Safety, Reliability, and Security
Microprocessors & Microsystems
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The ongoing scaling of CMOS technology facilitates the design of systems with continuously increasing functionality but also raises the susceptibility of these systems to reliability issues caused by high power densities and temperatures, respectively. Because of complexity reasons, the Electronic System Level (ESL) is gaining importance as starting point of design. Design alternatives are evaluated at ESL with respect to several design objectives, lately also including temperature. But temperatures are dominated by local power effects - a fact, that has not been sufficiently reflected at ESL until now. There is a lack of appropriate models, which we call ESL Power Density Gap. The contributions of this paper are twofold. First, we describe why the ESL Power Density Gap should be closed. In doing so, we want to stimulate a discussion. After that, we introduce a new ESL methodology for the power analysis of embedded processors, which can be considered as a first step to solve the aforementioned problem. It allows the generation of executable system models from a platform description, combining a functionality representation and component characterizations. Using an example application, it is shown that high power densities, usually invisible at ESL, can be uncovered by applying the proposed approach.