Voltage scheduling problem for dynamically variable voltage processors
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Power conscious fixed priority scheduling for hard real-time systems
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Design considerations for battery-powered electronics
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Battery-conscious task sequencing for portable devices including voltage/clock scaling
Proceedings of the 39th annual Design Automation Conference
Intra-Task Voltage Scheduling for Low-Energy, Hard Real-Time Applications
IEEE Design & Test
A scheduling model for reduced CPU energy
FOCS '95 Proceedings of the 36th Annual Symposium on Foundations of Computer Science
Power-aware scheduling and dynamic voltage setting for tasks running on a hard real-time system
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Extending the lifetime of fuel cell based hybrid systems
Proceedings of the 43rd annual Design Automation Conference
System-wide energy minimization for real-time tasks: lower bound and approximation
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Optimal selection of voltage regulator modules in a power delivery network
Proceedings of the 44th annual Design Automation Conference
PVS: passive voltage scaling for wireless sensor networks
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
Design of an efficient power delivery network in an soc to enable dynamic power management
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
Power deregulation: eliminating off-chip voltage regulation circuitry from embedded systems
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
DC–DC Converter-Aware Power Management for Low-Power Embedded Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Energy-aware task scheduling significantly reduces the total energy required by a system to perform a particular job, by dynamically changing the clock frequency and supply voltage at which the CPU operates. But this causes significant fluctuation of the current drawn from the power source, so that no single voltage regulator can achieve satisfactory efficiency over the entire range of operating currents. We introduce a new method of high-level power management called dynamic voltage regulator scheduling (DRS), which overcomes the fundamental limitation of using a single voltage regulator. In a system equipped with DRS, heterogeneous voltage regulators are connected to a CPU through a multiplexer-type MOSFET switch. As the operating frequency and the supply voltage of the CPU vary, the most efficient voltage regulator is used to supply the power. We first describe a greedy method of achieving DRS, and then we progress to an integer linear programming (ILP) formulation, which simultaneously optimizes DRS together with dynamic voltage and frequency scaling (DVFS). We evaluate the performance of both greedy DRS and optimal DRS. Compared to conventional DVFS, greedy DRS saves an additional 5.4% to 14.6% of the total system energy; and optimal DRS saves an additional 11.5% to 15.5%.