Clustered voltage scaling technique for low-power design
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
A low-power design method using multiple supply voltages
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Energy minimization using multiple supply voltages
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low power electronics and design
Properties of on-chip inductive current loops
Proceedings of the 12th ACM Great Lakes symposium on VLSI
Scaling trends of on-chip power distribution noise
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
Impedance characteristics of power distribution grids in nanoscale integrated circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Nanoelectronic circuits and systems
Maximum effective distance of on-chip decoupling capacitors in power distribution grids
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
Decoupling capacitors for multi-voltage power distribution systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Effective radii of on-chip decoupling capacitors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Power Distribution Networks with On-Chip Decoupling Capacitors
Power Distribution Networks with On-Chip Decoupling Capacitors
Inductive properties of high-performance power distribution grids
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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On-chip power distribution grids with multiple supply voltages are discussed in this paper. Two types of interdigitated and paired power distribution grids with multiple supply voltages and multiple grounds are presented. Analytic models are also developed to estimate the loop inductance in four types of proposed power delivery schemes. Two proposed schemes, fully and pseudo-interdigitated power delivery, reduce power supply voltage drops as compared to conventional interdigitated power distribution systems with dual supplies and a single ground by, on average, 15.3% and 0.3%, respectively. The performance of the proposed on-chip power distribution grids is compared to a reference power distribution grid with a single supply and a single ground. The voltage drop in fully interdigitated and fully paired power distribution grids with multiple supplies and multiple grounds is reduced, on average, by 2.7% and 2.3%, respectively, as compared to the voltage drop of an interdigitated power distribution grid with a single supply and a single ground. The proposed power distribution grids are a better alternative to a single supply voltage and a single ground power distribution system. On-chip resonances in power distribution grids with decoupling capacitors are intuitively explained in this paper, and circuit design implications are provided. It is also noted that fully interdigitated and fully paired power distribution grids with multiple supply voltages and multiple grounds are recommended to decouple power supply voltages.