Communications of the ACM
VLSI cell placement techniques
ACM Computing Surveys (CSUR)
Optimization by simulated evolution with applications to standard cell placement
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Translating concurrent communicating programs into asynchronous circuits
Translating concurrent communicating programs into asynchronous circuits
Computer
A single-rail re-implementation of a DCC error detector using a generic standard-cell library
ASYNC '95 Proceedings of the 2nd Working Conference on Asynchronous Design Methodologies
ASPRO-216: A Standard-Cell Q.D.I. 16-Bit RISC Asynchronous Microprocessor
ASYNC '98 Proceedings of the 4th International Symposium on Advanced Research in Asynchronous Circuits and Systems
An Asynchronous Low-Power 80C51 Microcontroller
ASYNC '98 Proceedings of the 4th International Symposium on Advanced Research in Asynchronous Circuits and Systems
RAPPID: An Asynchronous Instruction Length Decoder
ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
A Timing Verifier and Timing Profiler for Asynchronous Circuits
ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
AMULET3: A 100 MIPS Asynchronous Embedded Processor
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
Asynchronous Circuits: An Increasingly Practical Design Solution
ISQED '02 Proceedings of the 3rd International Symposium on Quality Electronic Design
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A new algorithm for automated standard cell placement of asynchronous Micropipeline designs has been developed. The resulting placement solutions are targeted to meet all bundled-data timing constraints while providing efficient chip areas. The placement algorithm utilizes the simulated evolution iterative heuristic. The cost function is a weighted sum of an area factor and a timing factor. Results of five experimental circuits show that full routability with reasonably efficient areas are possible.