Run-time instruction set selection in a transmutable embedded processor
Proceedings of the 45th annual Design Automation Conference
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Integration, the VLSI Journal
MinDeg: a performance-guided replacement policy for run-time reconfigurable accelerators
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Journal of Signal Processing Systems
A Variable-Grain Logic Cell and Routing Architecture for a Reconfigurable IP Core
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Cross-architectural design space exploration tool for reconfigurable processors
Proceedings of the Conference on Design, Automation and Test in Europe
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
The Instruction-Set Extension Problem: A Survey
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Exploring online synthesis for CGRAs with specialized operator sets
International Journal of Reconfigurable Computing - Special issue on selected papers from the international workshop on reconfigurable communication-centric systems on chips (ReCoSoC' 2010)
Selective instruction set muting for energy-aware adaptive processors
Proceedings of the International Conference on Computer-Aided Design
Teaching hardware/software codesign on a reconfigurable computing platform
ARC'12 Proceedings of the 8th international conference on Reconfigurable Computing: architectures, tools and applications
Evaluation of runtime task mapping using the rSesame framework
International Journal of Reconfigurable Computing - Special issue on Selected Papers from the International Conference on Reconfigurable Computing and FPGAs (ReConFig'10)
On supporting rapid exploration of memory hierarchies onto FPGAs
Journal of Systems Architecture: the EUROMICRO Journal
Partial online-synthesis for mixed-grained reconfigurable architectures
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
MORP: makespan optimization for processors with an embedded reconfigurable fabric
Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays
Proceedings of the International Conference on Computer-Aided Design
Design of the coarse-grained reconfigurable architecture DART with on-line error detection
Microprocessors & Microsystems
Timing characterization and constraining tool
Microelectronics Journal
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Fine- and Coarse-Grain Reconfigurable Computing gives the basic concepts and building blocks for the design of Fine- (or FPGA) and Coarse-Grain Reconfigurable Architectures. Recently-developed integrated architecture design and software-supported design flow of FPGA and coarse-grain reconfigurable architecture are also described. The book is accompanied by an interactive CD which include case studies and lab projects for the design of FPGA and Coarse-grain architectures based on the European funded projects AMDREL and MOLEN, respectively. Part I consists of two extensive surveys of FPGA and Coarse-Grain Reconfigurable Architectures: The FPGA technology is defined, which includes architecture, logic block structure, interconnect, and configuration methods and existing fine-grain reconfigurable architectures emerged from both academia and industry. Additionally, the implementation techniques and CAD tools developed to facilitate the implementation of a system in reconfigurable hardware by the industry and academia are provided. In addition the features, the advantages and limitations of the coarse-grain reconfigurable systems, the specific issues that should be addressed during the design phase, as well as representative existing coarse-grain reconfigurable systems are explained. In Part II, case studies, innovative research results about reconfigurable architectures and design frameworks from three projects AMDREL, MOLEN and ADRES&DRESC, and, a new classification according to microcoded architectural criteria are described. Fine- and Coarse-Grain Reconfigurable Computing is an essential reference for researchers and professionals and can be used as a textbook by undergraduate, graduate students and professors.