Fault models for embedded-DRAM macros

Authors:
Mango C.-T. Chao;Hao-Yu Yang;Rei-Fu Huang;Shih-Chin Lin;Ching-Yu Chin
Affiliations:
National Chiao-Tung University, Hsinchu, Taiwan;National Chiao-Tung University, Hsinchu, Taiwan;MediaTek Inc., Hsinchu, Taiwan;United Microelectronics Corporation, Hsinchu, Taiwan;National Chiao-Tung University, Hsinchu, Taiwan
Venue:
Proceedings of the 46th Annual Design Automation Conference
Year:
2009

Citing 12
Cited 1

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Abstract

In this paper, we compare embedded-DRAM (eDRAM) testing to both SRAM testing and commodity-DRAM testing, since an eDRAM macro uses DRAM cells with an SRAM interface. We first start from an standard SRAM test algorithm and discuss the faults which are not covered in the SRAM testing but should be considered in the DRAM testing. Then we study the behavior of those faults and the tests which can detect them. Also, we discuss how likely each modeled fault may occur on eDRAMs and commodity DRAMs, respectively.