The concept of resistance interval: a new parametric model for realistic resistive bridging fault
VTS '95 Proceedings of the 13th IEEE VLSI Test Symposium
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An Unified Fault Model and Test Generation Procedure for Interconnect Opens and Bridges
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High Quality Test Vectors for Bridging Faults in the Presence of IC's Parameters Variations
DFT '07 Proceedings of the 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems
Variation-Tolerant, Power-Safe Pattern Generation
IEEE Design & Test
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Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Variation Aware Analysis of Bridging Fault Testing
ATS '08 Proceedings of the 2008 17th Asian Test Symposium
Bridging fault modeling and simulation for deep submicron CMOS ICs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Longest-path selection for delay test under process variation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Proceedings of the Conference on Design, Automation and Test in Europe
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DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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This paper analyzes the behavior of resistive bridging faults under process variation and shows that process variation has a detrimental impact on test quality in the form of test escapes. To quantify this impact, a novel metric called test robustness is proposed and to mitigate test escapes, a new process variation-aware test generation method is presented. The method exploits the observation that logic faults that have high probability of occurrence and correspond to significant amounts of undetected bridge resistance have a high impact on test robustness and therefore should be targeted by test generation. Using synthesized International Symposium on Circuits and Systems benchmarks with realistic bridge locations, results show that for all the benchmarks, the method achieves better results (less test escapes) than tests generated without consideration of process variation.