The Omega test: a fast and practical integer programming algorithm for dependence analysis
Proceedings of the 1991 ACM/IEEE conference on Supercomputing
Validation with guided search of the state space
DAC '98 Proceedings of the 35th annual Design Automation Conference
Model checking
Composite model-checking: verification with type-specific symbolic representations
ACM Transactions on Software Engineering and Methodology (TOSEM)
Symbolic execution and program testing
Communications of the ACM
Rarity based guided state space search
GLSVLSI '01 Proceedings of the 11th Great Lakes symposium on VLSI
POPL '77 Proceedings of the 4th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Combining strengths of circuit-based and CNF-based algorithms for a high-performance SAT solver
Proceedings of the 39th annual Design Automation Conference
Symbolic Model Checking
SIVA: A System for Coverage-Directed State Space Search
Journal of Electronic Testing: Theory and Applications
Smart simulation using collaborative formal and simulation engines
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Checking Safety Properties Using Induction and a SAT-Solver
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Generating Efficient Test Sets with a Model Checker
SEFM '04 Proceedings of the Software Engineering and Formal Methods, Second International Conference
DART: directed automated random testing
Proceedings of the 2005 ACM SIGPLAN conference on Programming language design and implementation
Efficient SAT-based unbounded symbolic model checking using circuit cofactoring
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Accelerating high-level bounded model checking
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
ICSE '07 Proceedings of the 29th international conference on Software Engineering
SAT-Based Scalable Formal Verification Solutions (Series on Integrated Circuits and Systems)
SAT-Based Scalable Formal Verification Solutions (Series on Integrated Circuits and Systems)
Using counterexamples for improving the precision of reachability computation with polyhedra
CAV'07 Proceedings of the 19th international conference on Computer aided verification
A fast linear-arithmetic solver for DPLL(T)
CAV'06 Proceedings of the 18th international conference on Computer Aided Verification
DiVer: SAT-based model checking platform for verifying large scale systems
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
F-SOFT: software verification platform
CAV'05 Proceedings of the 17th international conference on Computer Aided Verification
CADE' 20 Proceedings of the 20th international conference on Automated Deduction
Bitwidth Reduction via Symbolic Interval Analysis for Software Model Checking
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Program analysis using symbolic ranges
SAS'07 Proceedings of the 14th international conference on Static Analysis
Efficient state space exploration: interleaving stateless and state-based model checking
Proceedings of the International Conference on Computer-Aided Design
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In practice, verification engines have to solve many checkers in a very tight time budget, especially, when the system to be analyzed is large, with many coverage criteria. To cope with such a situation, we propose improved and light-weight verification techniques that are built over the state-of-the-art engines such as bounded model checking (BMC), induction, and guided-simulation (directed testing). Specifically, we propose using control state reachability (CSR) information-- obtained from a given software system--to strengthen our induction-based proof engine. We also propose identifying and using lighthouses (or guide-posts)--intermediate control states--to simplify and reduce BMC instances, and to guide a simulation engine. We schedule these engines suitably to maximize the resource utilization. We implemented our techniques in a tool ACE, and integrated it in an industry strength software verification platform F--Soft to provide a robust and precise analysis framework. We show effectiveness of ACE on several industry and public benchmarks in a comparative study.