A faster approximation algorithm for the Steiner problem in graphs
Acta Informatica
Efficient minimum spanning tree construction without Delaunay triangulation
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Efficient Rectilinear Steiner Tree Construction with Rectilinear Blockages
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
An-OARSMan: obstacle-avoiding routing tree construction with good length performance
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Circuit simulation based obstacle-aware Steiner routing
Proceedings of the 43rd annual Design Automation Conference
A Fast and Stable Algorithm for Obstacle-Avoiding Rectilinear Steiner Minimal Tree Construction
ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
An O(nlogn) edge-based algorithm for obstacle-avoiding rectilinear steiner tree construction
Proceedings of the 2008 international symposium on Physical design
An O(n log n) path-based obstacle-avoiding algorithm for rectilinear Steiner tree construction
Proceedings of the 46th Annual Design Automation Conference
FLUTE: Fast Lookup Table Based Rectilinear Steiner Minimal Tree Algorithm for VLSI Design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Obstacle-Avoiding Rectilinear Steiner Tree Construction Based on Spanning Graphs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An exact algorithm for the construction of rectilinear Steiner minimum trees among complex obstacles
Proceedings of the 48th Design Automation Conference
Obstacle-avoiding rectilinear Steiner minimum tree construction: an optimal approach
Proceedings of the International Conference on Computer-Aided Design
Proceedings of the International Conference on Computer-Aided Design
Construction of rectilinear Steiner minimum trees with slew constraints over obstacles
Proceedings of the International Conference on Computer-Aided Design
WiT: optimal wiring topology for electromigration avoidance
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Proceedings of the 2014 on International symposium on physical design
Obstacle-avoiding rectilinear Steiner tree construction in sequential and parallel approach
Integration, the VLSI Journal
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Obstacle-avoiding rectilinear Steiner minimal tree (OARSMT) construction is becoming one of the most sought after problems in modern design flow. In this paper we present FOARS, an algorithm to route a multi-terminal net in the presence of obstacles. FOARS is a top down approach which includes partitioning the initial solution into subproblems and using obstacle aware version of Fast Lookup Table based Wire-length Estimation (OA-FLUTE) at a lower level to generate an OAST followed by recombining them with some backend refinement. To construct an initial connectivity graph FOARS uses a novel obstacle-avoiding spanning graph (OASG) algorithm which is a generalization of Zhou's spanning graph algorithm without obstacle [1]. FOARS has a run time complexity of O(n log n). Our experimental results indicate that it outperforms Lin et al. [2] by 2.3% in wirelength. FOARS also has 20% faster run time as compared with Long et al. [3], which is the fastest solution till date.