A novel multi-objective instruction synthesis flow for application-specific instruction set processors

Authors:
Hai Lin;Yunsi Fei
Affiliations:
University of Connecticut, Storrs, CT, USA;University of Connecticut, Storrs, CT, USA
Venue:
Proceedings of the 20th symposium on Great lakes symposium on VLSI
Year:
2010

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Abstract

Application-Specific Instruction set Processor (ASIP) has become an increasingly popular platform for embedded systems. Traditional ASIP synthesis flows mainly target performance improvement, with other design metrics not being addressed appropriately. In this paper, we show that traditional custom instruction exploration algorithms and cost estimation methods for performance improvement only are not suitable for other design objectives, such as energy reduction and area minimization. We propose an ASIP design flow that can be adapted to different design objectives and achieve the balance between them. A novel design space exploration algorithm is developed to identify custom instructions for execution acceleration and energy reduction while reducing the hardware overhead.