Hazard-based detection conditions for improved transition fault coverage of scan-based tests

Authors:
Irith Pomeranz;Sudhakar M. Reddy
Affiliations:
School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN;Electrical and Computer Engineering Department, University of Iowa, Iowa City, IA
Venue:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Year:
2010

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Abstract

We define a new type of detection conditions for delay faults, referred to as hazard-based detection conditions, to enhance the coverage of delay faults using the standard scan test application methods. Some delay faults, including irredundant faults, may be undetectable under the conventional detection conditions. These faults may be detectable under the hazard-based detection conditions. The use of hazard-based detection conditions thus improves the delay fault coverage achievable for a circuit. We consider transition faults under standard scan for the study in this paper.