Reducing variability in chip-multiprocessors with adaptive body biasing

Authors:
Alyssa Bonnoit;Lawrence Pileggi
Affiliations:
Carnegie Mellon University, Pittsburgh, PA, USA;Carnegie Mellon University, Pittsburgh, PA, USA
Venue:
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
Year:
2010

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Abstract

Body biasing has been demonstrated to be effective in addressing process variability in a variety of simple chip designs. Modern microprocessors implement dynamic voltage/frequency scaling, with significant implications for the use of body biasing. For a 16-core chip-multiprocessor implemented in a high-performance 22 nm technology, the body biases required to meet the frequency target at the lowest and highest voltage/frequency levels differ by an average of 0.7 V, implying that per-level biases are required to fully leverage body biasing. The need to make abrupt changes in the bias voltages when the voltage/frequency level changes affects the cost/benefit analysis of body biasing schemes. It is demonstrated that computing unique body biases for each voltage/frequency level at chip power-on offers the best tradeoff among a variety of methods in terms of area, performance, and power.