ECO-aware obstacle-avoiding routing tree algorithm

Authors:
Jui-Hung Hung;Yao-Kai Yeh;Yu-Cheng Lin;Hsin-Hsiung Huang;Tsai-Ming Hsieh
Affiliations:
Dept. of Information and Computer Engineering, Chung Yuan Christian University, Chung-Li, Taiwan, R.O.C.;Dept. of Information and Computer Engineering, Chung Yuan Christian University, Chung-Li, Taiwan, R.O.C.;Dept. of Information and Electronic Commerce, Kainan University, Taoyuan, Taiwan, R.O.C.;Dept. of Electronic Engineering, Lunghwa Univ. of Science and Technology, Taoyuan, Taiwan, R.O.C.;Dept. of Information and Computer Engineering, Chung Yuan Christian University, Chung-Li, Taiwan, R.O.C.
Venue:
WSEAS Transactions on Circuits and Systems
Year:
2010

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Abstract

This study formulates a novel routing problem of engineering change order- (ECO for short) aware Steiner minimal tree with obstacles and solves it by a multiple-stage approach, including partitioning, analysis distribution of spare cells, virtual node insertion and diagonal-based routing tree construction. The objective of this paper is to construct an ECO-aware routing tree in the sense of ECO resources. The number of available spare cells near the routing tree significantly increases while minimizing the additional length compared to the original tree algorithm. To efficiently analyze, an entire chip is divided into a set of fixed-size grids and the number of spare cells in each grid is calculated. To reduce the additional length, we insert the number of user-defined virtual nodes, which represent the grids with more spare cells. Furthermore, a graph-based routing algorithm is used to construct an X-architecture tree. To further reduce total wire length, each segment in the spanning tree is transferred into the corresponding combination of vertical, horizontal and diagonal segments. Experimental results show that the number of available spare cells is increases by 66.5%, while leading to only 2.8% additional total wire length.