Timing-driven X-architecture routing tree construction among rectangular and non-rectangular obstacles

Authors:
Shu-Ping Chang;Hsin-Hsiung Huang;Cheng-Chiang Lin;Tsai-Ming Hsieh
Affiliations:
Dept.of CAD, Genesys Logic Company, Taipei Country, Taiwan, R.O.C.;Dept. of Electronic Engineering, Lunghwa Univ. of Science and Technology, Taoyuan, Taiwan, R.O.C.;Dept. of Information and Computer Engineering, Chung Yuan Christian University, Chung-Li, Taiwan, R.O.C.;Dept. of Information and Computer Engineering, Chung Yuan Christian University, Chung-Li, Taiwan, R.O.C.
Venue:
WSEAS Transactions on Circuits and Systems
Year:
2009

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Abstract

In this paper, we formulate a new X-architecture routing problem in presence of non-rectangular obstacles, and propose an X-architecture timing-driven routing algorithm to minimize the maximum source-to-sink delay and the total wirelength simultaneously. First, a spanning graph is constructed by the terminals and the corners of the obstacles. A minimal spanning tree is then produced by performing searching algorithm to the spanning graph. The feasible X-architecture is constructed by transforming all slant edges of the minimal spanning tree. For the initial X-architecture routing tree, the delay of source-to-terminal is estimated by the modified Elmore delay model. According to the user defined delay threshold, an efficient rerouting algorithm is used to fix the timing violated nets. The critical terminals iteratively are rerouted by splitting two sub-trees and merging into one tree. Compared to the routing result without rerouting, the maximum source-to-sink delay is improved by 49.1% and only 2.5% of additional total wirlength is increased.