Electromagnetic radiation from video display units: an eavesdropping risk?
Computers and Security
IEEE Transactions on Computers
Handbook of Applied Cryptography
Handbook of Applied Cryptography
Smart Card Handbook
Examining Smart-Card Security under the Threat of Power Analysis Attacks
IEEE Transactions on Computers
Cryptography and Network Security: Principles and Practice
Cryptography and Network Security: Principles and Practice
A Practical Implementation of the Timing Attack
CARDIS '98 Proceedings of the The International Conference on Smart Card Research and Applications
CRYPTO '99 Proceedings of the 19th Annual International Cryptology Conference on Advances in Cryptology
Timing Attacks on Implementations of Diffie-Hellman, RSA, DSS, and Other Systems
CRYPTO '96 Proceedings of the 16th Annual International Cryptology Conference on Advances in Cryptology
Differential Fault Analysis of Secret Key Cryptosystems
CRYPTO '97 Proceedings of the 17th Annual International Cryptology Conference on Advances in Cryptology
DES and Differential Power Analysis (The "Duplication" Method)
CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems
Protecting Smart Cards from Passive Power Analysis with Detached Power Supplies
CHES '00 Proceedings of the Second International Workshop on Cryptographic Hardware and Embedded Systems
Differential Power Analysis in the Presence of Hardware Countermeasures
CHES '00 Proceedings of the Second International Workshop on Cryptographic Hardware and Embedded Systems
HIDE: an infrastructure for efficiently protecting information leakage on the address bus
ASPLOS XI Proceedings of the 11th international conference on Architectural support for programming languages and operating systems
An On-Chip Signal Suppression Countermeasure to Power Analysis Attacks
IEEE Transactions on Dependable and Secure Computing
Delay Insensitive Encoding and Power Analysis: A Balancing Act
ASYNC '05 Proceedings of the 11th IEEE International Symposium on Asynchronous Circuits and Systems
DPA on Quasi Delay Insensitive Asynchronous Circuits: Formalization and Improvement
Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
A VLSI Design Flow for Secure Side-Channel Attack Resistant ICs
Proceedings of the conference on Design, Automation and Test in Europe - Volume 3
Power Attack Resistant Cryptosystem Design: A Dynamic Voltage and Frequency Switching Approach
Proceedings of the conference on Design, Automation and Test in Europe - Volume 3
Proceedings of the 42nd annual Design Automation Conference
Handbook of Mathematical Functions, With Formulas, Graphs, and Mathematical Tables,
Handbook of Mathematical Functions, With Formulas, Graphs, and Mathematical Tables,
Power Analysis Attacks: Revealing the Secrets of Smart Cards (Advances in Information Security)
Power Analysis Attacks: Revealing the Secrets of Smart Cards (Advances in Information Security)
Investigations of power analysis attacks on smartcards
WOST'99 Proceedings of the USENIX Workshop on Smartcard Technology on USENIX Workshop on Smartcard Technology
On the importance of checking cryptographic protocols for faults
EUROCRYPT'97 Proceedings of the 16th annual international conference on Theory and application of cryptographic techniques
Power modeling of precharged address bus and application to multi-bit DPA attacks to DES algorithm
PATMOS'06 Proceedings of the 16th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
Techniques to enhance the resistance of precharged busses to differential power analysis
PATMOS'06 Proceedings of the 16th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
Leakage power analysis attacks: a novel class of attacks to nanometer cryptographic circuits
IEEE Transactions on Circuits and Systems Part I: Regular Papers
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This paper discusses a general model of differential power analysis (DPA) attacks to static logic circuits. Focusing on symmetric-key cryptographic algorithms, the proposed analysis provides a deeper insight into the vulnerability of cryptographic circuits. The main parameters that are of interest in practical DPA attacks are derived under suitable approximations, and a new figure of merit to measure the DPA effectiveness is proposed. Worst case conditions under which a cryptographic circuit should be tested to evaluate its robustness against DPA attacks are identified and analyzed. Several interesting properties of DPA attacks are also derived from the proposed model, whose fundamental expressions are compared with the counterparts of correlation power analysis attacks. The model was validated by means of DPA attacks on an FPGA implementation of the advanced encryption standard algorithm. Experimental results show that the model has a good accuracy, as its error is always lower than 2 %.