Gate-level redundancy: a new design-for reliability paradigm for nanotechnologies

  • Authors:
  • Ali Namazi;Mehrdad Nourani

  • Affiliations:
  • Department of Electrical Engineering, The University of Texas at Dallas, Richardson, TX;Department of Electrical Engineering, The University of Texas at Dallas, Richardson, TX

  • Venue:
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • Year:
  • 2010

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Abstract

Redundancy-based techniques have been widely used to correct the faulty behavior of components and achieve high reliability. N-tuple modular redundancy (NMR) systems, in particular, are all based on majority voting. The voter unit therefore becomes a bottleneck for the correct operation of any NMR system. In this paper, we propose a novel current-based voting strategy to design a robust NMR system. We show that, with this inexpensive strategy, we can completely eliminate the centralized voter unit and push NMR to the logic gate level. Our strategy achieves high reliability that is vital for future nanotechnology in which a high defect rate is expected. At the same time, it consumes less power and has less propagation delay compared to conventional NMR systems. Experimental results are reported to verify the concept, clarify the design procedure, and measure the system's reliability.