Logic design principles with emphasis on testable semicustom circuits
Logic design principles with emphasis on testable semicustom circuits
Pseudo-exhaustive testing strategy for large combinational circuits
Computer Systems Science and Engineering
Partitioning circuits for inproved testability
Proceedings of the fourth MIT conference on Advanced research in VLSI
A logic design structure for LSI testability
DAC '77 Proceedings of the 14th Design Automation Conference
An Implicit Enumeration Algorithm to Generate Tests for Combinational Logic Circuits
IEEE Transactions on Computers
Verification Testing A Pseudoexhaustive Test Technique
IEEE Transactions on Computers
IEEE Transactions on Computers
IEEE Transactions on Computers
Diagnosis of automata failures: a calculus and a method
IBM Journal of Research and Development
Bounds on pseudoexhaustive test lengths
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
| Hi-index | 0.00 |
Two pseudo-exhaustive test pattern generator designs are presented, each capable of exhaustively testing a single segment of a circuit. The generators are reconfigurable and easily controlled by a state machine to implement full pseudo-exhaustive test.